Wafer placement correction in indexed multi-station processing chambers

An apparatus comprising:

• a first chamber having an indexer and N pedestals in a circular array centered around a rotational axis of the indexer, wherein a pedestal of the N pedestals of the first chamber is a transfer pedestal, each pedestal of the first chamber is configured to support a wafer, N is an integer greater than one, the first chamber includes an active wafer centering system associated with the transfer pedestal, and the first chamber is a multi-station semiconductor processing chamber;
• a wafer handling robot having a robot arm configured to provide individual wafers to the transfer pedestal of the first chamber;
• and
• a controller that includes one or more processors and one or more memory devices, wherein:
• the one or more processors, the one or more memory devices, the wafer handling robot, the indexer of the first chamber, and the active wafer centering system of the first chamber are operably connected with each other, and
• the one or more memory devices store computer-executable instructions for controlling the one or more processors to:
• a) select one of the N pedestals of the first chamber as a destination pedestal of the first chamber for a first wafer;
• b) select a first pedestal offset associated with the destination pedestal of the first chamber from a set of N pedestal offsets of the first chamber, each pedestal offset of the set of N pedestal offsets of the first chamber associated with a different pedestal of the N pedestals of the first chamber;
• c) obtain information from the active wafer centering system of the first chamber indicative of a horizontal location of the center of the first wafer while the first wafer is on the robot arm;
• d) determine a first end effector offset associated with the first wafer based, at least in part, on the information obtained from the active wafer centering system of the first chamber indicative of the horizontal location of the center of the first wafer;
• e) cause the robot arm to provide the first wafer to the transfer pedestal of the first chamber based on the first pedestal offset and the first end effector offset;
• f) the indexer of the first chamber to move the first wafer from the transfer pedestal of the first chamber to the destination pedestal of the first chamber;
• and
• g) the first chamber to perform one or more semiconductor processing operations on the first wafer on the destination pedestal of the first chamber.