Remapping bad blocks in a memory sub-system
AssigneeMicron Technology, Inc.
InventorAmit Bhardwaj
Life of this patent
Estimating the term…
Abstract
Disclosed is a system that comprises a memory device comprising a plurality of memory planes and a processing device, operatively coupled with the plurality of memory planes, to perform operations that include, identifying a first block residing on a memory plane of the memory device, wherein the first block is associated with an error condition; and responsive to identifying the first block, performing an error recovery operation to replace the first block with a second block, wherein the second block resides on the memory plane.
Claims17
A system comprising:
- a memory device comprising a plurality of memory planes;
- and
- a processing device, operatively coupled with the plurality of memory planes, wherein the processing device is configured to:
- identify a first block residing on a memory plane of the memory device, wherein the first block is associated with an error condition by determining a failure of a memory access operation associated with the first block, and wherein the memory access operation comprises one of an erase operation, a program operation, or a read operation;
- and
- responsive to identifying the first block, perform an error recovery operation to replace the first block with a second block by determining an address of the first block and storing the address in a data structure, wherein the second block resides on the memory plane.
A method comprising:
- identifying a first block residing on a memory plane of a plurality of memory planes of a memory device, wherein the first block is associated with an error condition, wherein identifying the first block comprises determining a failure of a memory access operation associated with the first block, and wherein the memory access operation comprises one of an erase operation, a program operation, or a read operation;
- and
- responsive to identifying the first block, performing an error recovery operation to replace the first block with a second block, wherein the second block resides on the memory plane, and wherein performing the error recovery operation to replace the first block with the second block comprises determining an address of the first block and storing the address in a data structure.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- identifying a first block residing on a memory plane of a plurality of memory planes of a memory device, wherein the first block is associated with an error condition, wherein identifying the first block comprises determining a failure of a memory access operation associated with the first block, and wherein the memory access operation comprises one of an erase operation, a program operation, or a read operation;
- and
- responsive to identifying the first block, performing an error recovery operation to replace the first block with a second block, wherein the second block resides on the memory plane, and wherein performing the error recovery operation to replace the first block with the second block comprises determining an address of the first block and storing the address in a data structure.
Dependencies are inferred from the claim text.