US 12,217,790 B2 · Memory array connections

Abstract

A device includes a substrate, a first sense amplifier disposed on the substrate, a first word line driver disposed on the substrate and situated adjacent the first sense amplifier in the x-direction, and a first memory array disposed above the first sense amplifier and above the first word line driver in the z-direction. A plurality of first conductive segments extend alternately in the x-direction and the y-direction, and are disposed between the first memory array and the first sense amplifier and configured to electrically connect the first sense amplifier to a first bit line of the first memory array. A plurality of second conductive segments extend alternately in the x-direction and the y-direction, and are disposed between the first memory array and the first word line driver and configured to electrically connect the first word line driver to a first word line of the first memory array.

Claims20

Dependent claims

A device, comprising:

a substrate;
a first sense amplifier disposed on the substrate;
a first word line driver disposed on the substrate and situated adjacent the first sense amplifier on the substrate in the x-direction;
a first memory array disposed above the first sense amplifier and above the first word line driver in the z-direction;
a plurality of first conductive segments that extend alternately in the x-direction and the y-direction, the plurality of first conductive segments disposed between the first memory array and the first sense amplifier and configured to electrically connect the first sense amplifier to a first bit line of the first memory array;
and
a plurality of second conductive segments that extend alternately in the x-direction and the y-direction, the plurality of second conductive segments disposed between the first memory array and the first word line driver and configured to electrically connect the first word line driver to a first word line of the first memory array.

4 more elements

A device, comprising:

a first memory array and a second memory array that is spaced apart from the first memory array in the x-direction;
a first sense amplifier situated under the first memory array in the z-direction and a second sense amplifier situated under the second memory array in the z-direction;
a plurality of first conductive segments that extend alternately in the x-direction and the y-direction, the plurality of first conductive segments disposed between the first memory array and the first sense amplifier and between the first memory array and the second sense amplifier and configured to electrically connect the first sense amplifier and the second sense amplifier to the first memory array;
and
a plurality of second conductive segments that extend alternately in the x-direction and the y-direction, the plurality of second conductive segments disposed between the second memory array and the first sense amplifier and between the second memory array and the second sense amplifier and configured to electrically connect the first sense amplifier and the second sense amplifier to the second memory array.

2 more elements

A method of manufacturing a semiconductor device, the method comprising:

forming front-end-of-line devices on a substrate of the semiconductor device;
forming middle-end-of-line layers over the front-end-of-line devices in the z-direction;
forming first back-end-of-line metal routing layers over the middle-end-of-line layers in the z-direction;
forming back-end-of-line memory arrays adjacent each other in the x-direction and electrically connected to the first back-end-of-line metal routing layers;
and
forming second back-end-of-line metal routing layers over the back-end-of-line memory arrays in the z-direction.

3 more elements

Dependencies are inferred from the claim text.

Memory array connections

Life of this patent

Memory array connections

Life of this patent

Abstract

Claims20