Processing-in-memory devices having multiplication-and-accumulation circuits

A processing-in-memory (PIM) device comprising:

• a first memory bank configured to store weight data comprised of elements of a weight matrix;
• a second memory bank configured to store vector data comprised of elements of a vector matrix;
• a buffer configured to store constant data;
• and
• a multiplication-and-accumulation (MAC) circuit configured to selectively perform at least one of:
• a MAC arithmetic operation of the weight data and the vector data, and an element-wise multiplication (EWM) arithmetic operation of the weight data and the constant data,
• wherein the MAC circuit comprising:
• a MAC operator circuit configured to selectively perform the MAC arithmetic operation or the EWM arithmetic operation;
• and
• a data input circuit configured to provide the MAC operator circuit with the weight data, the vector data, and the constant data,
• wherein the data input circuit comprising:
• a first input latch configured to latch the weight data and output latched weight data to the MAC operator circuit;
• a data selection circuit configured to receive the vector data and the constant data to selectively output the vector data or the constant data according to the selected arithmetic operation;
• and
• a second input latch configured to latch output data of the data selection circuit and output latched output data to the MAC operator circuit, and
• wherein the data selection circuit includes:
• a third input latch configured to latch and output the constant data;
• a bit copy block configured to copy the constant data outputted from the third input latch to generate and output replica constant data;
• and
• a data selection output circuit configured to selectively output the replica constant data or the vector data.