Memory systems, operation methods thereof, and electronic devices

An operation method of a memory system, wherein the memory system comprises:

• at least one memory and a memory controller coupled to the memory;
• the memory comprises a plurality of word lines and a plurality of multi-bit memory cells coupled to the plurality of word lines;
• the memory comprises multiple types of pages;
• each type of page corresponds to at least one read voltage level;
• the operation method comprises:
• obtaining, when a read operation of the memory fails, a target read retry table from a set of read retry tables, wherein, each type of page in the multiple types of pages corresponds to a plurality of read retry tables, and wherein the set of read retry tables comprises all read retry tables corresponding to the multiple types of pages, and wherein a read retry table corresponding to each type of page comprises a set of bias voltages corresponding to respective read voltage levels that are used to distinguish stored data of corresponding bit;
• obtaining read retry voltages through the target read retry table, and performing a read retry operation using the read retry voltages.

An electronic device comprising:

• a memory system including:
• a memory, wherein the memory includes:
• a plurality of word lines;
• a plurality of multi-bit memory cells coupled to the plurality of word lines;
• and
• multiple types of pages, wherein type of page corresponds to at least one read voltage level;
• and
• a memory controller coupled to the memory and configured to:
• obtain, when a read operation of the memory fails, a target read retry table from a set of read retry tables wherein, each type of page in the multiple types of pages corresponds to a plurality of read retry tables, and wherein the set of read retry tables includes all read retry tables corresponding to the multiple types of pages, and wherein a read retry table corresponding to each type of page includes a set of bias voltages corresponding to respective read voltage levels that are used to distinguish stored data of corresponding bit;
• and
• obtain read retry voltages through the target read retry table, and perform a read retry operation using the read retry voltages.