Adaptive frequency control for high-speed memory devices
AssigneeMicron Technology, Inc.
InventorsJian Huang, Zhenming Zhou, Zhongguang Xu, Murong Lang
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsJian Huang, Zhenming Zhou, Zhongguang Xu, Murong Lang
Estimating the term…
A command to read specific data stored at a memory die is received. A read operation is performed while operating both a memory controller and the memory die simultaneously at a first frequency. A processor determines whether a first error rate associated with the memory die satisfies a first error threshold criterion (e.g., UECC). Responsive to determining that the first error rate satisfies the first error threshold criterion, the read operation is repeated while operating at least one of the memory controller or the memory die at a second frequency that is different from the first frequency. The processor determines whether a second error rate associated with the memory die satisfies a second error threshold criterion. Responsive to determining that the second error rate satisfies the second error threshold criterion (e.g. UECC persists), determining that the read operation has failed.
A method comprising:
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.