Current measurement for power converter circuits

A method comprising:

• generating, using a power converter, a regulated supply voltage;
• generating, using a first phase circuit of the power converter, a first demand current;
• generating, using a current sampling circuit of the first phase circuit, a stream of digital samples of the first demand current;
• storing, in a first memory circuit, a plurality of data words, wherein a given one of the plurality of data words comprises a plurality of digital samples;
• generating a trigger signal, using a trigger circuit, in response to detecting a trigger event in the stream of digital samples;
• generating, using a sample circuit and in response to the generation of the trigger signal, a timestamp value;
• and
• generating, using the sample circuit, an address indicative of a location in the first memory circuit storing a particular one of the plurality of digital samples corresponding to the trigger event.

A system comprising:

• a load circuit;
• a power converter configured to provide a regulated supply voltage to the load circuit, wherein the power converter includes a plurality of phase circuits, wherein ones of the plurality of phase circuits are configured to generate a demand current, and wherein a given one of the plurality of phase circuits includes:
• a current sampling circuit configured to generate a stream of digital samples of the demand current;
• a first memory circuit configured to store a plurality of data words, wherein a given one of the plurality of data words comprises a plurality of digital samples;
• and
• a trigger circuit configured to generate a trigger signal in response to detecting a trigger event in the stream of digital samples;
• and
• a sample circuit coupled to the plurality of phase circuits, wherein the sample circuit includes:
• a first control circuit configured to generate a timestamp value in response to generation of the trigger signal by at least one of the plurality of phase circuits, and further configured to generate and address indicative of a location in the first memory circuit storing a particular one of the plurality of digital samples corresponding to the trigger event.