Compute-in-memory systems and methods
AssigneeAltera Corporation
InventorsEriko Nurvitadhi, Scott J. Weber, Ravi Prakash Gutala, Aravind Raghavendra Dasu
Life of this patent
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Abstract
An integrated circuit device may include programmable logic circuitry on a first integrated circuit die and memory that includes compute-in-memory circuitry on a second die. The programmable logic circuitry may be programmed with a circuit design that operates on a first set of data. The compute-in-memory circuitry of the memory may perform an arithmetic operation using the first set of data from the programmable logic circuitry and a second set of data stored in the memory.
Claims20
An integrated circuit device comprising:
- a first die configurable to be programmed by a configuration bitstream comprising a circuit design for an artificial intelligence (AI) application that operates on input data to generate output data;
- and
- a second die comprising memory to store computational data, wherein the memory comprises compute-in-memory circuitry configurable to perform an arithmetic operation using the output data and the computational data, and wherein the first die is configurable to broadcast data to the compute-in-memory circuitry.
A method, comprising:
- implementing, via processing circuitry, a circuit design comprising an artificial intelligence (AI) application on a first die via a configuration bitstream;
- and
- initializing, via the processing circuitry, compute-in-memory circuitry on a second die based on loading computational data associated with the circuit design;
- transmitting, via the processing circuitry, data from the first die to the second die based on broadcasting the data to the compute-in-memory circuitry on the second die;
- and
- causing, via the processing circuitry, an arithmetic operation to be performed by the compute-in-memory circuitry of the second die using the computational data and the data to generate output data.
One or more tangible, non-transitory, machine-readable media comprising machine-readable instructions executable by one or more processors, wherein the instructions comprise instructions to:
- receive a circuit design comprising an artificial intelligence (AI) application to be programmed onto a first die;
- and
- generate a configuration bitstream to implement the circuit design comprising the AI application on the first die, wherein the configuration bitstream is to implement the AI application at least in part by:
- implementing the circuit design comprising the AI application on the first die;
- initializing compute-in-memory circuitry on a second die based on loading computational data associated with the circuit design;
- transmitting data from the first die to the second die based on broadcasting the data from the first die to the compute-in-memory circuitry on the second die;
- and
- causing an arithmetic operation to be performed by the compute-in-memory circuitry of the second die using the computational data and the data to generate output data.
Dependencies are inferred from the claim text.