Regulator circuit, an electronic device including the regulator circuit, and a processor including the regulator circuit

An electronic device, comprising:

• a regulator circuit configured to output a regulated voltage based on a reference voltage and a feedback voltage;
• and
• an oscillator configured to generate an output frequency signal based on a reference frequency signal and the regulated voltage output from the regulator circuit,
• wherein the regulator circuit includes:
• a feedback loop configured to output the regulated voltage based on a difference between the reference voltage and the feedback voltage;
• a first capacitor;
• a precharge circuit connected to the feedback loop, and configured to charge the first capacitor with a second voltage which is based on a first voltage;
• a first switch configured to connect the precharge circuit with the first capacitor;
• and
• a second switch configured to connect the first capacitor with the feedback loop,
• wherein the electronic device further includes an auto frequency calibration (AFC) circuit configured to output a first code,
• wherein a frequency and a phase of the output frequency signal are calibrated based on the first code.

A processor, comprising:

• a clock generator including a regulator circuit configured to output a regulated voltage based on a reference voltage and a feedback voltage and an oscillator configured to generate a clock signal based on a reference frequency signal and the regulated voltage;
• and
• a plurality of cores each configured to operate based on the clock signal,
• wherein the regulator circuit includes:
• a precharge circuit configured to charge a first capacitor with a second voltage by using a first voltage, in response to a first signal,
• wherein the second voltage is based on a difference between the first voltage and a feedback voltage of the precharge circuit, and
• wherein the first capacitor is connected to a first node of the regulator circuit, from which the first voltage is output, in response to a second signal,
• wherein the clock generator further includes:
• a control signal generator circuit configured to count a period of the reference frequency signal and to generate the first signal and the second signal based on a result of the counting, and
• wherein the first signal and the second signal are complementary to each other.