Semiconductor device including separation patterns and an electronic system
AssigneeSamsung Electronics Co., Ltd.
InventorJoongshik Shin
Life of this patent
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Abstract
A semiconductor device including: a horizontal wiring layer; a stack structure including a plurality of mold layers and a plurality of wiring layers alternately stacked on the horizontal wiring layer; a plurality of channel structures extending through the stack structure; and a plurality of separation patterns extending through the stack structure, wherein each of the plurality of separation patterns includes a plurality of first areas and a plurality of second areas adjacent to the plurality of first areas, wherein each of the plurality of first areas has a smaller width than each of the plurality of second areas.
Claims17
A semiconductor device, comprising:
- a horizontal wiring layer;
- a stack structure comprising a plurality of mold layers and a plurality of wiring layers alternately stacked on the horizontal wiring layer;
- a plurality of channel structures extending through the stack structure;
- and
- a plurality of separation patterns extending through the stack structure,
- wherein each of the plurality of separation patterns comprises a plurality of first areas and a plurality of second areas adjacent to the plurality of first areas, wherein each of the plurality of first areas has a smaller width than each of the plurality of second areas,
- wherein:
- the plurality of channel structures extends into the horizontal wiring layer;
- each of the plurality of separation patterns comprises a plurality of downward protrusions extending into the horizontal wiring layer;
- and
- a distance between a lowermost end of each of the plurality of downward protrusions and a lower surface of the horizontal wiring layer is smaller than a distance between a lowermost end of each of the plurality of channel structures and the lower surface of the horizontal wiring layer.
A semiconductor device, comprising:
- a horizontal wiring layer;
- a stack structure comprising a plurality of mold layers and a plurality of wiring layers alternately stacked on the horizontal wiring layer;
- a lower support between the horizontal wiring layer and the stack structure;
- a sealing conductive layer between the horizontal wiring layer and the lower support;
- a plurality of channel structures extending into the horizontal wiring layer via the stack structure, the lower support and the sealing conductive layer;
- and
- a plurality of separation patterns intersecting the stack structure and extending into the horizontal wiring layer via the lower support and the sealing conductive layer,
- wherein a side surface of the lower support is misaligned with a side surface of the stack structure,
- wherein at least one of the plurality of separation patterns comprises a downward protrusion extending into the horizontal wiring layer via the lower support and the sealing conductive layer, and
- wherein the downward protrusion terminates at a lower elevation in the horizontal wiring layer compared to termination points of the channel structures in the horizontal wiring layer.
An electronic system, comprising:
- a semiconductor device;
- and
- a controller to control the semiconductor device,
- wherein the semiconductor device comprises
- a horizontal wiring layer,
- a stack structure comprising a plurality of mold layers and a plurality of wiring layers alternately stacked on the horizontal wiring layer,
- a plurality of channel structures extending through the stack structure, and
- a plurality of separation patterns extending through the stack structure,
- wherein each of the plurality of separation patterns comprises a plurality of first portions having a smaller width than a plurality of second portions of the plurality of separation patterns,
- wherein the controller is electrically connected to the semiconductor device, and
- wherein a penetration depth of a downward protrusion of the separation patterns in the horizontal wiring layer is greater than a penetration depth of the channel structures in the horizontal wiring layer.
Dependencies are inferred from the claim text.