Semiconductor structure and method of manufacturing same

A semiconductor structure, comprising:

• a substrate, in which conductive contact regions are arranged, wherein the conductive contact regions are exposed from the substrate;
• bit line structures and isolation walls located on side walls of the bit line structures, wherein a plurality of the bit line structures are discretely located on the substrate, and each of the isolation walls comprises at least one isolation layer and a gap between the at least one isolation layer and a corresponding one of the bit line structures;
• and
• capacitor contact holes, each of which is constituted by a region surrounded by the isolation walls between adjacent bit line structures of the bit line structures, wherein the capacitor contact holes expose the conductive contact regions, and a top width of the capacitor contact holes is larger than a bottom width of the capacitor contact holes in a direction parallel to an arrangement direction of the bit line structures;
• and,
• wherein each of the bit line structures has a first chamfer θ on a top thereof, and the first chamfer θ is 5°-35°;
• and
• each of the gaps has a second chamfer θ1 on a top thereof, and the second chamfer θ1 is larger than the first chamfer θ.