Method of forming a wiring and method of manufacturing a semiconductor device using the same

A method for forming a wiring, the method comprising:

• forming an insulating interlayer on a substrate;
• forming a first etching mask on the insulating interlayer;
• performing a first etching process using the first etching mask to form first openings through the insulating interlayer, the first openings being spaced apart from each other;
• removing the first etching mask by an ashing process;
• forming a protection pattern on a bottom and a side of each of the first openings;
• forming a second etching mask on the protection pattern and the insulating interlayer;
• performing a second etching process using a second etching mask to form a second opening through the insulating interlayer, the second opening being disposed between the first openings;
• removing the second etching mask by an ashing process;
• removing the protection pattern;
• and
• forming the wiring in each of the first and second openings.

A method for manufacturing a semiconductor device, the method comprising:

• forming a buried gate structure in an upper portion of a substrate;
• forming a bit line structure on the substrate;
• forming a contact plug structure adjacent to the bit line structure on the substrate;
• forming a capacitor on the contact plug structure;
• and
• forming a wiring to be electrically connected to the capacitor,
• wherein forming the wiring includes:
• forming a first insulating interlayer on the capacitor, the first insulating interlayer including a low-k dielectric material,
• forming a first etching mask on the first insulating interlayer,
• performing a first etching process using the first etching mask to form a first opening through the first insulating interlayer,
• removing the first etching mask,
• forming a protection pattern on a bottom and a side of the first opening,
• forming a second etching mask on the protection pattern and the first insulating interlayer,
• performing a second etching process using a second etching mask to form a second opening through the first insulating interlayer,
• removing the second etching mask,
• removing the protection pattern, and
• forming the wiring in each of the first and second openings.