Memory device and manufacturing method

A static random access memory (SRAM) device, comprising:

• first and second transistors formed on opposite sides of a boundary of a first voltage region of a substrate, wherein the first and second transistors have first and second threshold voltages respectively, wherein the first and second threshold voltages are different from each other,
• wherein the first transistor comprises a first gate structure extending in a first direction, and the second transistor comprises a second gate structure extending in the first direction,
• wherein the first gate structure and the second gate structure are aligned to each other on a cross-sectional line along the first direction,
• wherein the boundary of the first voltage region between the first and second transistors is arranged closer to the first transistor.

A method, comprising:

• forming a first conductive structure across a plurality of first fins;
• forming a second conductive structure across a plurality of second fins, wherein the first conductive structure and the second conductive structure are aligned to each other on a cross-sectional line along a first direction;
• and
• forming a first layer above the first conductive structure and forming a second layer above the second conductive structure, a work function of the first layer being different from a work function of the second layer,
• wherein a boundary between the first and second layers is closer to the first conductive structure.