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US 12,191,856 B2Granted
Input buffer circuit and semiconductor system including the same
AssigneeSK hynix Inc.
InventorsIn Seok Kong, Jae Hyeong Hong, Min Su Kim
Life of this patent
Estimating the term…
Abstract
An input buffer circuit includes a signal input circuit and a linear setting circuit. The signal input circuit is configured to receive an input signal to generate an output signal based on a reference voltage and an activation current. The linear setting circuit is configured to compare a voltage of a first modeling node, which may correspond to the input signal, with a voltage of a second modeling node, which may correspond to the reference voltage, to generate a bias voltage for controlling the activation voltage.
Claims16
An input buffer circuit comprising:
- a signal input circuit configured to receive an input signal to generate an output signal based on a reference voltage and an activation current;
- and
- a linear setting circuit configured to compare a voltage of a first modeling node, which corresponds to the input signal, with a voltage of a second modeling node, which corresponds to the reference voltage, to generate a bias voltage for controlling the activation current.
A semiconductor system comprising:
- a transmission circuit configured to provide an input signal reflecting an on-resistance value and on-resistance information corresponding to the on-resistance value;
- and
- an input buffer circuit including a signal input circuit and a linear setting circuit, the signal input circuit configured to receive the input signal to generate an output signal based on a reference voltage and an activation current, and the linear setting circuit configured to compare a voltage of a first modeling node, which corresponds to the input signal, with a voltage of a second modeling node, which corresponds to the reference voltage, to generate a bias voltage for controlling the activation current.
Dependencies are inferred from the claim text.