Pulse width modulation circuit

A method for pulse width modulation (PWM), comprising:

• by a controller coupled to a PWM circuit:
• calculating a period value and a duty cycle value for use in the PWM circuit;
• determining that the duty cycle value is less than the period value;
• determining that a count value of a counter of the PWM circuit is equal to a value of a duty cycle register of the PWM circuit;
• and
• loading the duty cycle value into the duty cycle register responsive to the count value being equal to the value of the duty cycle register, and the duty cycle value being less than the period value.

A non-transient computer-readable medium encoded with instructions that when executed cause a processor to:

• calculate a period value and a duty cycle value for use in a pulse width modulation (PWM) circuit;
• determine that the duty cycle value is less than the period value;
• determine that a count value of a counter of the PWM circuit is equal to a value of a duty cycle register of the PWM circuit;
• and
• load the duty cycle value into the duty cycle register responsive to the count value being equal to the value of the duty cycle register, and the duty cycle value being less than the period value.

A power factor correction (PFC) circuit, comprising:

• a half-bridge circuit, including a high-side transistor and a low-side transistor;
• a pulse width modulation (PWM) system including:
• a PWM circuit having:
• a first output coupled to the high-side transistor;
• a second output coupled to the low-side transistor;
• a counter;
• a period register;
• and
• a duty cycle register;
• and
• a controller coupled to the PWM circuit, the controller configured to:
• calculate a period value and a duty cycle value;
• and
• load the duty cycle value into the duty cycle register responsive to a count value of the counter being equal to a value of the duty cycle register, and the duty cycle value being less than the period value.