Semiconductor device and method

A method comprising:

• forming a multi-layer stack on a semiconductor substrate;
• etching the multi-layer stack and the semiconductor substrate to form a nanostructure, the nanostructure comprising a fin-shaped region comprising silicon, a first channel region on the fin-shaped region and comprising silicon germanium, and a second channel region on the first channel region and comprising silicon germanium, wherein the fin-shaped region comprises first straight sidewalls disposed at a first angle with respect to a major surface of the semiconductor substrate after etching the multi-layer stack and the semiconductor substrate;
• forming a shallow trench isolation region surrounding the first straight sidewalls of the fin-shaped region;
• and
• trimming the first channel region and the second channel region, wherein the first channel region comprises second straight sidewalls above a top surface of the shallow trench isolation region and disposed at a second angle with respect to the major surface of the semiconductor substrate after trimming the first channel region and the second channel region, the second angle being closer to perpendicular than the first angle, wherein fin-shaped region comprising silicon comprises third straight sidewalls below the top surface of the shallow trench isolation region and disposed at a third angle with respect to the major surface of the semiconductor substrate, the third angle being further from perpendicular than the second angle.

A method comprising:

• forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer having a first germanium concentration;
• forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer comprising silicon;
• forming a third semiconductor layer on the first semiconductor layer, the third semiconductor layer having a second germanium concentration less than the first germanium concentration;
• etching the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the semiconductor substrate to form a first channel region, a second channel region, a third channel region, and a fin-shaped region, respectively, the third channel region being over and aligned with the first channel region, the second channel region being horizontally spaced apart from the first channel region;
• and
• trimming the first channel region and the third channel region, wherein a first angle between a sidewall of the first channel region and a major surface of the semiconductor substrate after trimming the first channel region and the third channel region is closer to perpendicular than a second angle between the sidewall of the first channel region and the major surface of the semiconductor substrate before trimming the first channel region and the third channel region, wherein after trimming, a third angle between a sidewall of the second channel region and the major surface of the semiconductor substrate is further from perpendicular than the second angle.