Field effect transistor with disabled channels and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Xuan Huang, Hou-Yu Chen, Jin Cai, Zhi-Chang Lin, Chih-Hao Wang
Life of this patent
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Abstract
A device includes a vertical stack of semiconductor nanostructures, a gate structure, a first epitaxial region and a dielectric structure. The gate structure wraps around the semiconductor nanostructures. The first epitaxial region laterally abuts a first semiconductor nanostructure of the semiconductor nanostructures. The dielectric structure laterally abuts a second semiconductor nanostructure of the semiconductor nanostructures and vertically abuts the first epitaxial region.
Claims20
A method, comprising:
- forming a first device on a substrate, including:
- forming a vertical stack of semiconductor layers over the substrate;
- forming a sacrificial gate structure that wraps around a portion of the vertical stack;
- forming first openings adjacent to the sacrificial gate structure by recessing the vertical stack;
- forming a first epitaxial layer in the first openings;
- forming a second epitaxial layer in the first openings on the first epitaxial layer;
- removing the sacrificial gate structure;
- forming a gate structure that wraps around the semiconductor layers;
- exposing the first epitaxial layer by thinning the substrate from a backside of the substrate;
- forming second openings by recessing the first epitaxial layer;
- and
- forming a dielectric structure in the second openings.
A device, comprising:
- a vertical stack of semiconductor nanostructures;
- a gate structure that wraps around the semiconductor nanostructures;
- a first epitaxial region laterally abutting a first semiconductor nanostructure of the semiconductor nanostructures;
- and
- a dielectric structure that laterally abuts a second semiconductor nanostructure of the semiconductor nanostructures and vertically abuts the first epitaxial region.
A device, comprising:
- a first device including:
- a first vertical stack of first nanostructures;
- a first gate structure that wraps around the first nanostructures;
- a first epitaxial region that laterally abuts the first nanostructures;
- and
- a first dielectric structure that laterally abuts the first nanostructures and extends to a first level above a first number of the first nanostructures;
- and
- a second device laterally offset from the first device, the second device including:
- a second vertical stack of second nanostructures;
- a second gate structure that wraps around the second nanostructures;
- a second epitaxial region that laterally abuts the second nanostructures;
- and
- a second dielectric structure that laterally abuts the second nanostructures and extends to a second level above a second number of the second nanostructures, the second number being different than the first number.
Dependencies are inferred from the claim text.