Stacked semiconductor devices in sealants and interconnected with pillar electrodes
AssigneeAOI Electronics Co., Ltd.
InventorTakashi Suzuki
Life of this patent
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AssigneeAOI Electronics Co., Ltd.
InventorTakashi Suzuki
Estimating the term…
Problem: To reduce the likelihood of insufficient electrical continuity in wiring in a semiconductor device. Solution: A method for manufacturing a semiconductor device includes placing, on a substrate surface, a first semiconductor element having a first surface on which a first pillar electrode is formed, via a surface opposite to the first surface, sealing a substrate-side pillar electrode and the first pillar electrode with a first sealant, removing a part of the first sealant to expose an end of the substrate-side pillar electrode and an end of the first pillar electrode, forming, on the first sealant, a plating layer electrically connected to the substrate-side pillar electrode and the first pillar electrode by plating, removing a part of the plating layer to form a residual plating layer, coupling a second semiconductor element onto the residual plating layer or a metal layer or a wiring layer formed on the residual plating layer, and sealing the residual plating layer and the second semiconductor element using a second sealant such that the first sealant is in contact with the second sealant.
A semiconductor device comprising:
Dependencies are inferred from the claim text.