Image sensor and semiconductor device including asymmetric active region

An image sensor, comprising:

• a pixel separation part in a substrate and separating a first unit pixel and a second unit pixel from each other;
• a first device isolation part in the first unit pixel and defining a structured first active region;
• a first gate electrode that extends in a first direction across the first active region and bas a first gate sidewall and a second gate sidewall that are spaced apart from each other in a second direction orthogonal to the first direction;
• and
• a first impurity region and a second impurity region in the first active region and respectively disposed at the first gate sidewall and the second gate sidewall,
• wherein the first active region includes:
• a first active central part that overlaps the first gate electrode;
• a first active protrusion in which the first impurity region is disposed;
• and
• a second active protrusion in which the second impurity region is disposed,
• wherein the first device isolation part has a first isolation sidewall overlapping the first active central part, wherein the first isolation sidewall extends parallel to the second direction,
• wherein a first straight line is at least partially spaced apart from the first isolation sidewall, wherein the first straight line links a first point to a second point, wherein the first point is where the first active protrusion meets the first active central part and is adjacent to the first isolation sidewall, and the second point is where the second active protrusion meets the first active central part and is adjacent to the first isolation sidewall, and
• wherein the first isolation sidewall vertically overlaps the first gate electrode.

A semiconductor device, comprising:

• a device isolation part in a substrate and defining an active region;
• a first gate electrode that extends in a first direction across the active region and has a first gate sidewall and a second gate sidewall that are spaced apart from each other in a second direction intersecting the first direction;
• and
• a first impurity region and a second impurity region disposed in the active region and respectively adjacent to the first gate sidewall and the second gate sidewall,
• wherein the device isolation part has a first isolation sidewall that vertically overlaps the first gate electrode, wherein the first isolation sidewall is parallel to the second direction,
• wherein the first impurity region has a first corner point that is adjacent to the first isolation sidewall, wherein the first corner point is where the first impurity region meets the first gate sidewall,
• wherein the second impurity region has a second corner point that is adjacent to the first isolation sidewall, wherein the second corner point is where the second impurity region meets the second gate sidewall, and
• wherein a first straight line is at least partially spaced apart from the first isolation sidewall, wherein the first straight line links the first corner point to the second corner point.