Semiconductor package with recessed molding region disposed below housing and above semiconductor chip

A semiconductor package, comprising:

• a package substrate;
• a semiconductor chip on the package substrate, the semiconductor chip including a logic chip and a memory stack structure on the logic chip;
• a connector below the package substrate;
• a molding layer that covers the semiconductor chip, the molding layer having a recess region on a top surface of the molding layer;
• a housing that covers the molding layer, the housing including a first part on the top surface of the molding layer, a second part below the package substrate, and a third part that connects the first part and the second part to each other;
• and
• an air gap defined by the first part of the housing and the recess region of the molding layer, the air gap vertically overlapping the semiconductor chip,
• wherein a portion of the molding layer is disposed between a top surface of the semiconductor chip and a bottom surface of the recess region.

A semiconductor package, comprising:

• a package substrate;
• a semiconductor chip on the package substrate, the semiconductor chip including a logic chip and a memory stack structure on the logic chip;
• a passive element on the package substrate and spaced apart from the semiconductor chip;
• a connector and a connector terminal below the package substrate;
• a molding layer that covers the semiconductor chip and the passive element, the molding layer having a recess region on a top surface of the molding layer;
• a housing that covers the molding layer, the housing including a first part on the top surface of the molding layer, a second part below the package substrate, and a third part that connects the first part and the second part to each other;
• an opening defined by a bottom surface of the package substrate, the second part, and the third part;
• and
• an air gap defined by the first part of the housing and the recess region of the molding layer, the molding layer separating the memory stack structure from the air gap,
• wherein a portion of the molding layer is disposed between a top surface of the semiconductor chip and a bottom surface of the recess region.