US 12,191,248 B2Granted

Semiconductor arrangement and method of making

AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.

InventorsWan-Yu Lo, Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang, Hsiang-Ku Shen, Dian-Hau Chen

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Abstract

A method of forming a semiconductor arrangement includes forming a first capacitor in a first voltage domain and forming a second capacitor in the first voltage domain. The first capacitor is connected in parallel with the second capacitor. A third capacitor and a fourth capacitor are formed in a second voltage domain. The third capacitor is connected in series with the fourth capacitor. The first capacitor and the second capacitor are connected in parallel with a supply terminal of the first voltage domain and a reference terminal of the first voltage domain. The fourth capacitor is connected to a supply terminal of the second voltage domain. The third capacitor is connected to a reference terminal of the second voltage domain.

Claims20

Dependent claims

A semiconductor arrangement, comprising:

a first conductive plate;
a first portion of a dielectric material over the first conductive plate;
a second conductive plate over the first portion of the dielectric material;
a second portion of the dielectric material over the second conductive plate;
a third conductive plate over the second portion of the dielectric material;
a third portion of the dielectric material over the third conductive plate;
a fourth conductive plate over the third portion of the dielectric material;
a fourth portion of the dielectric material over the fourth conductive plate;
a fifth conductive plate over the fourth portion of the dielectric material;
a first conductive via directly physically contacting the first conductive plate and the fifth conductive plate;
a second conductive via directly physically contacting the third conductive plate;
and
a third conductive via directly physically contacting the second conductive plate and the fourth conductive plate.

10 more elements

A semiconductor arrangement, comprising:

a first voltage domain connected to at least one of a core region or a logic region configured to operate at a first supply voltage, the first voltage domain comprising:
a first supply terminal for receiving the first supply voltage from a first voltage source;
a first reference terminal;
and
a first capacitor network connected across the first supply terminal and the first reference terminal and comprising a stack of alternating layers of a conductive material having a first thickness and a dielectric material having a second thickness, wherein the first supply voltage is less than a breakdown voltage of the dielectric material having the second thickness;
and
a second voltage domain connected to an input/output region configured to operate at a second supply voltage different than the first supply voltage, the second voltage domain comprising:
a second supply terminal for receiving the second supply voltage from a second voltage source;
a second reference terminal;
and
a second capacitor network connected across the second supply terminal and the second reference terminal and comprising the stack of alternating layers of the conductive material having the first thickness and the dielectric material having the second thickness, wherein the second supply voltage is greater than the breakdown voltage of the dielectric material having the second thickness.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/335,242Filed 1 Jun 2021 · us provisional application
Priority: 5 Mar 2021
Published: US 2022/0285263 A18 Sep 2022
Granted: 7 Jan 2025
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

H10W 20/496
Capacitive arrangements or effects of, or between wiring layers: capacitor integral with wiring layers
H10D 1/68
Capacitors: capacitors having no potential barriers
H10W 20/056
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
H10W 20/42
Characterised by their conductive parts: vias, e.g. via plugs

Family

Application63/157,394Us provisional application · filed 5 Mar 2021
US 2022/0285263 A1Pre-grant publication · published 8 Sep 2022
US 12,191,248 B2This patent

From the US filing history. Foreign family members aren’t listed.

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