Memory device performing sensing operation and method of operating the same

A method of operating a memory device, the method comprising:

• generating defect information indicating a defect state in which a value of a cell current measured in a sensing operation on selected memory cells among a plurality of memory cells is less than a threshold value;
• performing a test operation on the selected memory cells using a test reference current in response to the defect information;
• and
• setting a bit line voltage to be used in the sensing operation based on a comparison result between a number of fail bits detected in the test operation and a reference number.

A memory device comprising:

• a memory cell array;
• a peripheral circuit configured to perform a sensing operation on the memory cell array;
• and
• a control logic configured to:
• control the peripheral circuit to perform a test operation on selected memory cells within the memory cell array using a test reference current when a value of a cell current measured in the sensing operation is less than a threshold value, and
• set a bit line voltage to be used in the sensing operation based on a comparison result between a number of fail bits detected in the test operation and a reference number.

A control circuit comprising:

• a defect detector configured to generate defect information indicating a defect state in which a value of a cell current measured in a sensing operation is less than a threshold value;
• a test processor configured to generate control signals for a test operation of a memory device, the test operation using a test reference current higher than a sensing reference current used in the sensing operation, in response to the defect information;
• a test information generator configured to generate test information indicating pass or fail of the test operation based on a comparison result between the number of fail bits detected in the test operation and a reference number;
• and
• a parameter setter configured to set parameters related to the sensing operation in response to the test information.

A memory device comprising:

• a peripheral circuit configured to measure operation cell currents flowing through respective bit lines coupled to a memory cell group by applying an operation voltage to the bit lines;
• and
• a control logic configured to:
• control the peripheral circuit to measure test cell currents flowing through the respective bit lines by applying a test voltage to the bit lines,
• count, based on the test cell currents, a number of off-cells within the group to determine whether the number is a threshold or less,
• repeat, by raising the test voltage, the controlling and the counting until the number becomes the threshold or less, and
• update the operation voltage to the test voltage when the number becomes the threshold or less.