Memory circuit, system and method for rapid retrieval of data sets
AssigneeSunrise Memory Corporation
InventorEli Harari
Life of this patent
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Abstract
A 3-dimensional array of NOR memory strings being organized by planes of NOR memory strings, in which (i) the storage transistors in the NOR memory strings situated in a first group of planes are configured to be programmed, erased, program-inhibited or read in parallel, and (ii) the storage transistors in NOR memory strings situated within a second group of planes are configured for storing resource management data relating to data stored in the storage transistors of the NOR memory strings situated within the first group of planes, wherein the storage transistors in NOR memory strings in the second group of planes are configured into sets.
Claims19
A 3-dimensional array of NOR memory strings formed above a planar surface of a semiconductor substrate, wherein each NOR memory string comprises:
- a first group of thin-film memory transistors;
- and
- a second group of thin-film memory transistors, wherein the thin-film memory transistors in the first group and the thin-film memory transistors in the second group share a common drain region and a common source region, wherein the thin-film memory transistors in the first group are configured to be accessed within a first access time and the thin-film memory transistors in the second group are configured to be accessed within a second access time, and wherein the first access time is less than the second access time.
Dependencies are inferred from the claim text.