Memory circuit and method of operating the same

A memory circuit comprising:

• a bias voltage generator comprising:
• an operational amplifier and a first buffer configured to generate a first bias voltage based on a reference voltage;
• and
• a plurality of second buffers configured to generate a plurality of second bias voltages based on the first bias voltage;
• and
• a plurality of voltage clamp devices coupled to the plurality of second buffers, wherein
• each second buffer of the plurality of second buffers comprises a first parallel arrangement of a first current source and a second current source in series with a first switch, and
• each voltage clamp device of the plurality of voltage clamp devices is configured to apply a drive voltage to a corresponding resistance-based memory device of a plurality of resistance-based memory devices based on the corresponding second bias voltage of the plurality of second bias voltages.

A method of operating a memory circuit, the method comprising:

• using a first buffer to generate a first bias voltage based on a reference voltage;
• using a plurality of second buffers to generate a plurality of second bias voltages based on the first bias voltage;
• and
• using each voltage clamp device of a plurality of voltage clamp devices to apply a drive voltage to a corresponding resistance-based memory device of a plurality of resistance-based memory devices based on a corresponding second bias voltage of the plurality of second bias voltages.