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US 12,190,929 B2Granted
Memory array, memory cell, and data read and write method thereof
AssigneeChangxin Memory Technologies, Inc.
InventorsYulei Wu, Xiaoguang Wang
Life of this patent
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Abstract
The present disclosure provides a memory array, a memory cell, and a data read and write method thereof. Two storage nodes are provided in each memory cell of a memory array of a magnetic random access memory (MRAM), such that when one storage node in the memory cell fails, the other storage node in the memory cell can be used to write and read data.
Claims20
A memory cell, comprising:
- a first storage node, separately connected to a first terminal of a transistor and a first bit line;
- a second storage node, separately connected to the first terminal of the transistor and a second bit line;
- the transistor, provided with a second terminal connected to a source line and a third terminal connected to a word line;
- and
- a switch structure, configured to control conduction between a first terminal and a third terminal thereof, or to control the conduction between a second terminal and the third terminal thereof.
2 more elements
A data read and write method of a memory cell, comprising:
- providing the memory cell comprising:
- a first storage node, separately connected to a first terminal of a transistor and a first bit line;
- a second storage node, separately connected to the first terminal of the transistor and a second bit line;
- the transistor, provided with a second terminal connected to a source line and a third terminal connected to a word line;
- and
- a switch structure, configured to control conduction between a first terminal and a third terminal thereof, or to control the conduction between a second terminal and the third terminal thereof;
- performing data writing or data reading on the memory cell comprising:
- determining whether the first storage node fails, wherein
- when it is determined that the first storage node fails, performing the data writing or the data reading on the second storage node;
- and
- when it is determined that the first storage node does not fail, performing the data writing or the data reading on the first storage node.
8 more elements
A data read and write method of a memory cell, comprising:
- providing the memory cell comprising:
- a first storage node, separately connected to a first terminal of a transistor and a first bit line;
- a second storage node, separately connected to the first terminal of the transistor and a second bit line;
- the transistor, provided with a second terminal connected to a source line and a third terminal connected to a word line;
- and
- a switch structure, configured to control conduction between a first terminal and a third terminal thereof, or to control the conduction between a second terminal and the third terminal thereof;
- performing data writing or data reading on the memory cell comprising:
- determining whether the first storage node fails, wherein
- when it is determined that the first storage node fails, performing the data writing or the data reading on the second storage node;
- and
- when it is determined that the first storage node does not fail, performing the data writing or the data reading on the first storage node.
8 more elements
Dependencies are inferred from the claim text.