Array substrate and display apparatus

An array substrate, comprising K number of columns of first pads;

• wherein a respective first pad is connected to an anode of a light emitting element, a second electrode of a fifth transistor, and a second electrode of a sixth transistor;
• the K number of columns of first pads comprise a plurality of first-first pads in (2k-1)-th columns of the K columns and a plurality of second-first pads in (2k)-th columns of the K columns;
• and
• a respective first-first pad and a respective second-first pad have different average line widths;
• wherein the array substrate further comprises multiple first-first reset signal lines in the (2k-1)-th columns and multiple second-first reset signal lines in the (2k)-th columns of the K columns;
• a first parasitic capacitance between a respective first-first pad and a respective first-first reset signal line in the (2k-1)-th columns of the K columns is different from a second parasitic capacitance between a respective second-first pad and a respective second-first reset signal line in the (2k)-th columns of the K columns.