Display substrate, display panel and display device

A display substrate, comprising:

• a base substrate;
• a plurality of pixel circuits provided on the base substrate, wherein the plurality of pixel circuits are arranged in an array in a first direction and a second direction;
• a plurality of groups of data lines provided on the base substrate, wherein the plurality of groups of data lines are arranged in the first direction, and at least one column of pixel circuits is electrically connected to at least one group of data lines;
• and
• a plurality of first power lines provided on the base substrate, wherein the plurality of first power lines are arranged in the first direction, and at least one column of pixel circuits is electrically connected to at least one first power line;
• wherein the at least one column of pixel circuits comprises a first pixel circuit and a second pixel circuit alternately arranged in the second direction, each of the first pixel circuit and the second pixel circuit comprises an input transistor, and the at least one group of data lines comprises a first data line and a second data line;
• wherein for the at least one column of pixel circuits, the data lines electrically connected to the column of pixel circuits, and the first power line electrically connected to the column of pixel circuits, the input transistor of the first pixel circuit is electrically connected to the first data line, and the input transistor of the second pixel circuit is electrically connected to the second data line;
• and
• wherein an orthographic projection of the first data line on the base substrate, an orthographic projection of the first power line on the base substrate and an orthographic projection of the second data line on the base substrate are arranged in sequence in the first direction, an orthographic projection of the input transistor of the first pixel circuit on the base substrate is located on a side of the orthographic projection of the first power line on the base substrate close to the orthographic projection of the first data line on the base substrate, and an orthographic projection of the input transistor of the second pixel circuit on the base substrate is located on a side of the orthographic projection of the first power line on the base substrate close to the orthographic projection of the second data line on the base substrate.