Low power mmWave receiver architecture with spatial compression interface

A method for a wireless communication, comprising:

• deactivating an analog data compression circuit and activating a digital data compression circuit,
• generating, at the digital data compression circuit, a data compression metric based on a plurality of digital signals;
• deactivating the digital data compression circuit and activating the analog data compression circuit,
• generating, at the analog data compression circuit, one or more compressed analog data signals based on a plurality of analog signals and the data compression metric, wherein the analog data compression circuit is configured to compress the plurality of analog signals by selectively deactivating one or more receive chains of a plurality of receive chains utilized to convey the plurality of analog receive signals to an analog-to-digital converter (ADC) circuit;
• and
• generating, at the ADC, one or more compressed digital data signals based on the one or more compressed analog data signals.

A receiver circuit comprising:

• an analog-to-digital converter (ADC) circuit;
• a digital data compression circuit coupled to the ADC circuit, the digital data compression circuit being configured to, during a digital mode of operation,
• generate a compression metric signal with a data compression metric based on a plurality of digital signals, and
• an analog data compression circuit coupled to the ADC circuit, the analog data compression circuit being configured to, during a hybrid mode of operation,
• generate one or more compressed analog data signals based on a plurality of analog signals and the data compression metric comprised in the compression metric signal,
• wherein the analog data compression circuit is configured to compress the plurality of analog signals by selectively deactivating one or more receive chains of a plurality of receive chains utilized to convey the plurality of analog receive signals to the ADC circuit;
• and
• generating one or more compressed digital data signals by the ADC circuit digitizing the one or more compressed analog data signals.