Machine-learning assisted decoder with asymmetric ratio tracking in non-volatile memory devices
AssigneeSK hynix Inc.
InventorsMeysam Asadi, Fan Zhang
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AssigneeSK hynix Inc.
InventorsMeysam Asadi, Fan Zhang
Estimating the term…
Devices, systems, and methods for improving performance of an iterative decoder in a non-volatile memory are described. An example method includes receiving a noisy codeword that is based on a transmitted codeword generated from a low-density parity-check (LDPC) code, performing, on the noisy codeword for a first number of iterations, a message passing algorithm between a plurality of variable nodes and a plurality of check nodes that represent a parity matrix of the LDPC code, assigning, based on comparing an asymmetric ratio to a threshold, a set of asymmetric LLRs to a set of LLRs (that were initialized using symmetric LLRs) used in the message passing algorithm, and determining, subsequent to performing the message passing algorithm on the noisy codeword for a second number of iterations, a candidate version of the transmitted codeword.
A method for improving a performance of an iterative decoder in a non-volatile memory, comprising:
An apparatus for improving a performance of an iterative decoder in a non-volatile memory, comprising:
A non-transitory computer-readable storage medium having instructions stored thereupon for improving a performance of an iterative decoder in a non-volatile memory, comprising:
Dependencies are inferred from the claim text.