Sub-sampling phase locked loop (SSPLL) with saturated reference feedback

A sub-sampling phase locked loop (SSPLL), comprising:

• a phase detector configured to
• receive a reference signal and a feedback signal, wherein the reference signal has a reference frequency,
• sample the feedback signal, and
• output a phase detection signal indicative of a phase of the feedback signal;
• a voltage controlled oscillator configured to generate an output signal based on the phase detection signal, wherein the output signal has an output frequency greater than the reference frequency;
• a selection control module configured to detect a signal edge of the output signal and generate a selection signal based on the detected signal edge;
• and
• a multiplexer configured to selectively supply as the feedback signal, based on the selection signal,
• in a first portion of a cycle of the reference signal, the output signal of the voltage controlled oscillator, and
• in a second portion of the cycle of the reference signal, a supply voltage.