Glitch-free low-pass filter circuit and system circuit using the same

A glitch-free low-pass filter circuit, comprising:

• an integrating circuit, configured to receive an input signal of the low-pass filter circuit, and integrate the input signal to generate an integral signal;
• a Schmitt trigger, electrically connected to the integrating circuit, and configured to receive the integral signal, and generate a hysteresis signal based on the integral signal;
• a first feedback logic circuit, electrically connected to the integrating circuit and the Schmitt trigger, and configured to pull the integral signal down to a reset voltage or up to a set voltage based on the input signal and the hysteresis signal;
• and
• a second feedback logic circuit, electrically connected to the Schmitt trigger and the integrating circuit, and configured to pull the integral signal down to the reset voltage or up to the set voltage based on a transition state of the hysteresis signal;
• wherein when the hysteresis signal is transitioned, the second feedback logic circuit pulls the integral signal down to the reset voltage or up to the set voltage regardless of a state of the input signal.

A system circuit, comprising:

• a glitch-free low-pass filter circuit, comprising:
• an integrating circuit, configured to receive an input signal of the low-pass filter circuit, and integrate the input signal to generate an integral signal;
• a Schmitt trigger, electrically connected to the integrating circuit, and configured to receive the integral signal, and generate a hysteresis signal based on the integral signal;
• a first feedback logic circuit, electrically connected to the integrating circuit and the Schmitt trigger, and configured to pull the integral signal down to a reset voltage or up to a set voltage based on an inverted input signal and an inverted hysteresis signal, wherein the inverted input signal is generated by performing an inversion process on the input signal, and the inverted hysteresis signal is generated by performing the inversion process on the hysteresis signal;
• and
• a second feedback logic circuit, electrically connected to the Schmitt trigger and the integrating circuit, and configured to pull the integral signal down to the reset voltage or up to the set voltage based on the inverted hysteresis signal and an output signal of the low-pass filter circuit, wherein the output signal is generated by performing the inversion process on the hysteresis signal twice;
• and
• a load circuit, electrically connected to the low-pass filter circuit, and configured to receive the output signal as a clock signal for operation.