Synchronous bridge rectifier using planar switching elements

A bridge rectifier comprising:

• a monolithic die, the monolithic die comprising:
• a first planar transistor occupying a first quadrant of the monolithic die;
• the first planar transistor having a gate, a drain and a source;
• a second planar transistor occupying a second quadrant of the monolithic die;
• the second planar transistor having a gate, a drain and a source;
• a third planar transistor occupying a third quadrant of the monolithic die;
• the third planar transistor having a gate, a drain and a source;
• a fourth planar transistor occupying a fourth quadrant of the monolithic die;
• the fourth planar transistor having a gate, a drain and a source;
• a first metallic pad mechanically attached to the monolithic die and occupying portions of the first and second quadrants, the first metallic pad configured to electrically couple the drain of the first planar transistor to the drain of the second planar transistor;
• a second metallic pad mechanically attached to the monolithic die and occupying portions of the second and third quadrants, the second metallic pad configured to electrically couple the source of the second planar transistor to the drain of the third planar transistor;
• a third metallic pad mechanically attached to the monolithic die and occupying portions of the third and fourth quadrants, the third metallic pad configured to electrically couple the source of the third planar transistor to the source of the fourth planar transistor;
• a fourth metallic pad mechanically attached to the monolithic die and occupying portions of the third and fourth quadrants, the fourth metallic pad configured to electrically couple the drain of the fourth planar transistor to the source of the first planar transistor;
• a fifth metallic pad mechanically attached to the monolithic die and occupying a portion of the first quadrant, the fifth metallic pad coupled to the gate of the first planar transistor;
• a sixth metallic pad mechanically attached to the monolithic die and occupying a portion of the second quadrant, the sixth metallic pad coupled to the gate of the second planar transistor;
• a seventh metallic pad mechanically attached to the monolithic die and occupying a portion of the third quadrant, the seventh metallic pad coupled to the gate of the third planar transistor;
• an eighth metallic pad mechanically attached to the monolithic die and occupying a portions of the fourth quadrant, the eighth metallic pad coupled to the gate of the fourth planar transistor;
• a plurality of controller integrated circuits mechanically attached to the monolithic die, the plurality of controller integrated circuits configured to generate drive signals for controlling the gate terminals of the first, second, third and fourth planar transistors, wherein the plurality of controller integrated circuits comprises exactly three controller integrated circuits, including a first controller integrated circuit for controlling the gate of the first planar transistor, a second controller integrated circuit for controlling the gate of the second planar transistor, and a third controller integrated circuit for controlling the gate of the third planar transistor and the gate of the fourth planar transistor, wherein the integrated circuit assembly comprises exactly seven terminals, including two bridge rectifier input terminals, two bridge rectifier output terminals, and three supply terminals, one for each of the three integrated circuit controllers;
• and
• three capacitors wherein each of the three supply terminals is coupled to corresponding one of the three capacitors and wherein the capacitors are external to the integrated circuit assembly.

An integrated circuit assembly comprising:

• a monolithic die comprising:
• a first planar transistor occupying a first quadrant of the monolithic die, the first planar transistor having a gate, a drain and a source;
• a second planar transistor occupying a second quadrant of the monolithic die;
• the second planar transistor having a gate, a drain and a source;
• a third planar transistor occupying a third quadrant of the monolithic die, the third planar transistor having a gate, a drain and a source;
• and
• a fourth planar transistor occupying a fourth quadrant of the monolithic die, the fourth planar transistor having a gate, a drain and a source;
• a plurality of controller integrated circuits mechanically attached to the monolithic die, the plurality of controller integrated circuits configured to generate drive signals for controlling the gate terminals of the first, second, third and fourth planar transistors, wherein the plurality of controller integrated circuits comprises exactly three controller integrated circuits, including a first controller integrated circuit for controlling the gate of the first planar transistor, a second controller integrated circuit for controlling the gate of the second planar transistor, and a third controller integrated circuit for controlling the gate of the third planar transistor and the gate of the fourth planar transistor, wherein the integrated circuit assembly functions as a bridge rectifier and comprises exactly seven terminals, including two bridge rectifier input terminals, two bridge rectifier output terminals, and three supply terminals, one for each of the three integrated circuit controllers;
• and
• three capacitors wherein each of the three supply terminals is coupled to corresponding one of the three capacitors and wherein the capacitors are internal to the integrated circuit assembly.

An integrated circuit assembly comprising:

• a monolithic die comprising:
• a first planar transistor occupying a first quadrant of the monolithic die, the first planar transistor having a gate, a drain and a source;
• a second planar transistor occupying a second quadrant of the monolithic die;
• the second planar transistor having a gate, a drain and a source;
• a third planar transistor occupying a third quadrant of the monolithic die, the third planar transistor having a gate, a drain and a source;
• a fourth planar transistor occupying a fourth quadrant of the monolithic die, the fourth planar transistor having a gate, a drain and a source;
• a plurality of controller integrated circuits mechanically attached to the monolithic die, the plurality of controller integrated circuits configured to generate drive signals for controlling the gate terminals of the first, second, third and fourth planar transistors, wherein the plurality of controller integrated circuits comprises exactly three controller integrated circuits, including a first controller integrated circuit for controlling the gate of the first planar transistor, a second controller integrated circuit for controlling the gate of the second planar transistor, and a third controller integrated circuit for controlling the gate of the third planar transistor and the gate of the fourth planar transistor, wherein the integrated circuit assembly functions as a bridge rectifier and comprises exactly seven terminals, including two bridge rectifier input terminals, two bridge rectifier output terminals, and three supply terminals, one for each of the three integrated circuit controllers;
• and
• three capacitors wherein each of the three supply terminals is coupled to corresponding one of the three capacitors and wherein the capacitors are internal to the integrated circuit assembly.