Electrostatic discharge and electrical overstress detection circuit
AssigneeMontage Technology Co., Ltd.
InventorsXiong Zhang, Chunlai Sun
Life of this patent
Estimating the term…
Loading patent…
AssigneeMontage Technology Co., Ltd.
InventorsXiong Zhang, Chunlai Sun
Estimating the term…
An electrostatic discharge and electrical overstress detection circuit includes protection circuit, sensing circuit, clamp circuit, several stages of sampling logic circuits connected in sequence and storage circuit. Protection circuit is coupled between input/output pin and internal chip and discharges to a power supply terminal when the electrostatic discharge or electrical overstress events happen. Sensing circuit and clamp circuit are coupled between power supply terminal and ground terminal. Each stage of sampling logic circuit is coupled to power supply terminal and memory cell of storage circuit, and the first stage of sampling logic is coupled to the clamp circuit, and when the electrostatic discharge or electrical overstress events happen, the several stages of sampling logic circuits sample voltage of the power supply terminal one by one and change state of corresponding memory cell, so that the electrostatic discharge or electrical overstress events are successively recorded by the memory cell.
An electrostatic discharge and electrical overstress detection circuit for recording electrostatic discharge and electrical overstress events on an input/output pin coupled with an internal chip, wherein the detection circuit comprises:
Dependencies are inferred from the claim text.