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US 12,183,819 B2Granted
Silicon carbide semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorsHiroyuki Fujisawa, Akimasa Kinoshita
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, gate insulating films, gate electrodes, an insulating film, first electrodes, a second electrode, and trenches. The first semiconductor regions and the second semiconductor regions are periodically disposed apart from one another in a first direction in which the trenches extend in a stripe pattern.
Claims19
A semiconductor device, comprising:
- a plurality of trenches provided at a first main surface of a semiconductor base that includes a semiconductor substrate of a first conductivity type, the plurality of trenches including a plurality of longitudinal portions that each extend in a first direction;
- a plurality of first semiconductor regions of the first conductivity type, each first semiconductor region being selectively provided at the first main surface of the semiconductor base and being in contact with a sidewall of one of the plurality of longitudinal portions;
- a plurality of bottom regions of a second conductivity type, respectively in contact with bottoms of respective ones of the plurality of longitudinal portions;
- and
- a second semiconductor region of the second conductivity type, provided along a sidewall of a corresponding one of the plurality of longitudinal portions and extending from the first main surface of the semiconductor base to a corresponding one of the plurality of bottom regions that is in contact with the corresponding one of the plurality of longitudinal portions, wherein
- the second semiconductor region includes a plurality of upper portions thereof that are periodically exposed from the first main surface of the semiconductor base in the first direction, and
- on the first main surface, in the first direction, an interval of, among the plurality of upper portions of the second semiconductor region, an adjacent two upper portions that are adjacent in the first direction is greater than a length of each of the plurality of upper portions of the second semiconductor region.
4 more elements
A semiconductor device, comprising:
- a plurality of trenches provided at a first main surface of a semiconductor base that includes a semiconductor substrate of a first conductivity type, the plurality of trenches including a plurality of longitudinal portions that each extend in a first direction;
- a plurality of mesa regions, each being provided between an adjacent two longitudinal portions among the plurality of longitudinal portions that are adjacent in a second direction orthogonal to the first direction;
- and
- a plurality of bottom regions of a second conductivity type, respectively in contact with bottoms of respective ones of the plurality of longitudinal portions, wherein
- each mesa region includes:
- a semiconductor layer of the second conductivity type;
- a plurality of first semiconductor regions of the first conductivity type, each first semiconductor region being selectively provided at the first main surface of the semiconductor base and in contact with a sidewall of one of the adjacent two longitudinal portions;
- and
- a plurality of connecting regions of the second conductivity type that are periodically provided in the first direction, the plurality of connecting regions connecting the semiconductor layer to bottom regions that are respectively in contact with the adjacent two longitudinal portions forming said each mesa region,
- the semiconductor layer includes a plurality of upper portions thereof that are periodically exposed from the first main surface of the semiconductor base in the first direction, and
- on the first main surface, in the first direction, an interval of, among the plurality of upper portions of the semiconductor layer, an adjacent two upper portions that are adjacent in the first direction is greater than a length of each of the plurality of upper portions of the semiconductor layer.
8 more elements
A semiconductor device, comprising:
- a plurality of trenches provided at a first main surface of a semiconductor base that includes a semiconductor substrate of a first conductivity type, the plurality of trenches including a plurality of longitudinal portions that respectively extend in a first direction;
- a plurality of first mesa regions respectively provided between a first adjacent two longitudinal portions among the plurality of longitudinal portions that are adjacent in a second direction orthogonal to the first direction;
- a plurality of second mesa regions respectively provided between a second adjacent two longitudinal portions among the plurality of longitudinal portions that are adjacent in the second direction;
- and
- a gate electrode embedded in each of the plurality of longitudinal portions via a gate insulating film, wherein
- each of the plurality of first mesa regions includes:
- a plurality of first semiconductor regions of the first conductivity type, each first semiconductor region being selectively provided at the first main surface of the semiconductor base and being in contact with the gate insulating film;
- and
- a semiconductor layer of a second conductivity type that is in contact with the gate insulating film under the plurality of first semiconductor regions, and
- each of the plurality of second mesa regions includes:
- a second semiconductor region of the second conductivity type, extending from a bottom of one of the second adjacent two longitudinal portions to a bottom of another of the second adjacent two longitudinal portions,
- the semiconductor layer includes a plurality of upper portions thereof that are periodically exposed from the first main surface of the semiconductor base in the first direction, and
- on the first main surface, in the first direction, an interval of, among the plurality of upper portions of the semiconductor layer, an adjacent two upper portions that are adjacent in the first direction is greater than a length of each of the plurality of upper portions of the semiconductor layer.
10 more elements
Dependencies are inferred from the claim text.