Power semiconductor device and manufacturing method therefor

A power semiconductor device, comprising:

• a substrate of a first conductivity type;
• a drain metal disposed on a first surface of the substrate;
• a drift region of the first conductivity type and disposed on a second surface of the substrate, the second surface being opposite to the first surface;
• a base region of a second conductivity type and disposed in the drift region;
• the first conductivity type and the second conductivity type being opposite conductivity types;
• a gate structure comprising a gate dielectric layer on the drift region and a gate on the gate dielectric layer, the gate structure extending above the base region;
• a first-conductivity-type doping region in contact with the base region on one side of the base region away from the gate structure;
• a source region of the first conductivity type and disposed in the base region and between the first-conductivity-type doping region and the gate structure;
• a contact metal disposed on the first-conductivity-type doping region and forming a contact barrier having rectification characteristics with the first-conductivity-type doping region below, wherein a dimension of the contact metal in a first direction is greater than a dimension of the first-conductivity-type doping region in the first direction, such that the contact metal extends to a position above the base region next to the first-conductivity-type doping region and not reaching the source region, the first direction being a wiring direction between the gate and the contact metal;
• and
• a source metal wrapping the contact metal and in contact with the source region.