Semiconductor devices and methods of fabricating the same

A method, comprising:

• providing a first semiconductor fin, a second semiconductor fin, and a third semiconductor fin each protruding from a substrate and oriented lengthwise in a first direction;
• forming a dielectric feature over the substrate to fill space between the first and second semiconductor fins and space between the second and third semiconductor fins;
• selectively recessing the dielectric feature to form a first isolation feature between the first and second semiconductor fins and a second isolation feature between the second and third semiconductor fins, wherein a height of the first isolation feature is greater than a height of the second isolation feature;
• after the forming of the first and second isolation features, forming a placeholder gate over the first, second, and third semiconductor fins, wherein the first and the second isolation features are embedded in the placeholder gate;
• forming source/drain features;
• selectively removing the placeholder gate without substantially etching the first and second isolation features;
• and
• forming a metal gate stack over the substrate, wherein a top surface of the first isolation feature is above a top surface of the metal gate stack, and a top surface of the second isolation feature is below a top surface of the metal gate stack.

A semiconductor structure, comprising:

• a first plurality of channel members over a substrate;
• a second plurality of channel members over the substrate;
• a third plurality of channel members over the substrate;
• a gate structure wrapping around the first, second, and third plurality of channel members;
• a first dummy fin disposed between the first plurality of channel members and the second plurality of channel members;
• and
• a second dummy fin disposed between the second plurality of channel members and the third plurality of channel members,
• wherein a top surface of the first dummy fin is above a top surface of the gate structure, and a top surface of the second dummy fin is below a top surface of the gate structure.