Semiconductor arrangement comprising a source pad, gate pad, drain pad, backside interconnect line, and backside contact, and backside conductive line and method of making

A method of forming a semiconductor arrangement, comprising:

• forming a first source pad over a semiconductor layer;
• forming a first nanosheet contacting the first source pad;
• forming a gate pad adjacent the first nanosheet;
• forming a first drain pad over the gate pad and contacting the first nanosheet;
• forming a backside interconnect line under the gate pad and the first source pad;
• and
• forming a first backside contact to connect the backside interconnect line to the gate pad.

A semiconductor arrangement, comprising:

• a first source pad and a second source pad over a semiconductor layer;
• a first nanosheet contacting the first source pad;
• a second nanosheet contacting the second source pad;
• a gate pad adjacent the first nanosheet;
• a first drain pad over the gate pad and contacting the first nanosheet;
• a second drain pad over the gate pad and contacting the second nanosheet;
• a backside interconnect line under the gate pad and the first source pad;
• a first backside contact contacting the first source pad;
• and
• a second backside contact contacting the second source pad.