System and method for stacking compression attached memory modules

A method, comprising:

• affixing a first side of a first z-axis compression connector to a printed circuit board of an information handling system at a first location, the first compression connector having a first depth;
• affixing a first surface of a first memory circuit board of a first memory module to a second side of the first compression connector;
• affixing a first side of a second z-axis compression connector to the printed circuit board at a second location adjacent to the first location, the second compression connector having a second depth that is greater than the first depth;
• and
• affixing a first surface of a second memory circuit board of a second memory module to a second side of the second compression connector;
• wherein the first memory module is accessed via a first memory channel of the information handling system and the second memory module is accessed via a second memory channel of the information handling system.

An information handling system, comprising:

• a processor;
• a first z-axis compression connector having a first depth;
• a first memory module including a plurality of first memory devices mounted on at least one of a first surface and second surface of a first memory circuit board of the first memory module;
• a second z-axis compression connector having a second depth that is greater than the first depth;
• a second memory module including a plurality of second memory devices mounted on at least one of a first surface and second surface of a second memory circuit board of the second memory module;
• and
• a printed circuit board, wherein a first side of the first compression connector is affixed to the printed circuit board at a first location, the first surface of the first memory circuit board is affixed to a second side of the compression connector, a first side of the second compression connector is affixed to the printed circuit board at a second location adjacent to the first location, and the first side of the second memory circuit board is affixed to a second side of the second compression connector;
• wherein the processor accesses the first memory devices via a first memory channel and accesses the second memory devices via a second memory channel.