Method for manufacturing semiconductor structure
AssigneeNanya Technology Corporation
InventorsTing-Cih Kang, Hsih-Yang Chiu
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Abstract
The present disclosure provides a method for manufacturing a semiconductor structure employing a via structure. The method includes forming a first conductive pad on a first semiconductor device; forming a second conductive pad on the first conductive pad; connecting a second semiconductor device to the first semiconductor device; and forming a via structure in the second semiconductor device, The via structure contacts the second conductive pad, and the first conductive pad and the second conductive pad are formed of different metal materials.
Claims10
A method of manufacturing a semiconductor structure, comprising:
- forming a first conductive pad on a first semiconductor device;
- forming a second conductive pad on the first conductive pad, wherein an upper surface of the first conductive pad is in direct contact with a bottom surface of the second conductive pad, wherein a width of the second conductive pad is smaller than a width of the first conductive pad;
- connecting a second semiconductor device to the first semiconductor device via an adhesive layer;
- and
- forming a via structure in the second semiconductor device, wherein the via structure, having a trapezoid shape, has a width gradually reduced from an upper surface of the via structure to a bottom surface thereof, wherein the upper surface of the via structure is coplanar with an upper surface of the second semiconductor device, wherein the via structure is extended through the adhesive layer at a position that the bottom surface of the via structure contacts an upper surface of the second conductive pad, wherein a width of the bottom surface of the via structure is smaller than the width of the second conductive pad;
- wherein the first conductive pad and the second conductive pad are formed of different metal materials;
- wherein the forming of the second conductive pad on the first conductive pad comprises:
- forming a dielectric layer on the first conductive pad;
- forming an opening in the dielectric layer to expose the first conductive pad;
- and forming the second conductive pad in the opening, wherein a width of the opening is less than the width of the first conductive pad, wherein the opening is a through opening having a depth equal to a thickness of the dielectric layer, such that the upper surface of the second conductive pad is coplanar with an upper surface of the dielectric layer while a bottom surface of the second conductive pad is coplanar with a bottom surface of the dielectric layer, wherein the upper surface of the second conductive pad is in direct contact with the bottom surface of the via structure while the bottom surface of the second conductive pad is in direct contact with the upper surface of the first conductive pad, wherein the adhesive layer, which is a single layer, has an upper side bonded to a bottom surface of the second semiconductor device and a bottom side bonded to the upper surface of the dielectric layer and the upper surface of the second conductive pad.
Dependencies are inferred from the claim text.