Double resist structure for electrodeposition bonding
AssigneeInternational Business Machines Corporation
InventorsKoki Nakamura, Toyohiro Aoki, Takashi Hisada
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsKoki Nakamura, Toyohiro Aoki, Takashi Hisada
Estimating the term…
A semiconductor structure includes a wafer having a wafer outer surface; a semiconductor chip; and a plurality of copper pillars on the semiconductor chip. The pillars have curved end portions and pillar outside surfaces. Also included are a plurality of copper pads on the wafer. The pads have end portions aligned with the curved end portions of the plurality of copper pillars on the semiconductor chip, and the curved end portions of the plurality of copper pillars and the end portions of the plurality of copper pads define a plurality of bonding material receiving regions. The pads have pad outside surfaces. A copper bonding layer is on the pillar outside surfaces, the pad outside surfaces, the bonding material receiving regions, and portions of the outer surface of the wafer. The portions have an annular shape about the copper pads when viewed in plan.
A semiconductor structure comprising:
Dependencies are inferred from the claim text.