Method of manufacturing package structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJen-Yuan Chang, Chia-Ping Lai
Life of this patent
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Abstract
A method of manufacturing a package structure is provided. The method of manufacturing a package structure comprises receiving a first semiconductor structure and a second semiconductor structure; forming an isolation layer on each semiconductor structure; forming at least one supporting structure and at least one pad trench in the isolation layer; filling the pad trench with electrically conductive material; planarizing the isolation layer and the electrically conductive material to form bonding pads in a bonding layer on each semiconductor structure; and bonding the semiconductor structures.
Claims20
A method of manufacturing a package structure, comprising
- receiving a first semiconductor structure and a second semiconductor structure;
- forming an isolation layer on each semiconductor structure;
- forming at least one supporting structure and at least one pad trench in the isolation layer;
- filling the pad trench with electrically conductive material;
- planarizing the isolation layer and the electrically conductive material to form bonding pads in a bonding layer on each semiconductor structure;
- and
- bonding the semiconductor structures,
- wherein each bonding pad has a bonding surface including a bonding region and at least one buffer region;
- and a ratio of a surface area of the buffer region to that of the bonding region is from about 0.01 to about 10.
A method of manufacturing a package structure, comprising
- receiving a first semiconductor structure and a second semiconductor structure;
- forming an isolation layer with a recess on each semiconductor structure, so that the semiconductor structure exposed from the recess;
- forming a supporting material layer in the at least one recess to cover the exposed portion of the semiconductor structure;
- removing a portion of the supporting material layer to form at least one supporting structure and at least one pad trench in the isolation layer;
- filling the pad trench with an electrically conductive material;
- planarizing the isolation layer and the electrically conductive material to form bonding pads in a bonding layer on each semiconductor structure;
- and
- bonding the semiconductor structures,
- wherein each bonding pad has a bonding surface including a bonding region and at least one buffer region;
- and a ratio of a surface area of the buffer region to that of the bonding region is from about 0.01 to about 10.
A method of manufacturing a package structure, comprising
- receiving a first semiconductor structure and a second semiconductor structure;
- forming an isolation layer with a recess on each semiconductor structure, so that the semiconductor structure exposed from the recess;
- forming a supporting material layer in the at least one recess to cover the exposed portion of the semiconductor structure;
- removing a portion of the supporting material layer to form at least one supporting structure and at least one pad trench in the isolation layer;
- forming an electrically conductive interlayer along a bottom and a sidewall of the pad trench and a top of the supporting structure;
- filling the pad trench with electrically conductive material;
- planarizing the isolation layer and the electrically conductive material to form bonding pads in a bonding layer on each semiconductor structure;
- and
- bonding the semiconductor structures,
- wherein each bonding pad has a bonding surface including a bonding region and at least one buffer region;
- and a ratio of a surface area of the buffer region to that of the bonding region is from about 0.01 to about 10.
Dependencies are inferred from the claim text.