Chip structure with etch stop layer

A chip structure, comprising:

• a substrate;
• an interconnect structure over the substrate;
• a conductive pad over the interconnect structure;
• a passivation layer covering the interconnect structure and exposing the conductive pad;
• a buffer layer over the passivation layer;
• an etch stop layer over the buffer layer, wherein a ratio of a first thickness of the buffer layer to a second thickness of the etch stop layer ranges from about 10 to about 20;
• and
• a device element over the etch stop layer.

A chip structure, comprising:

• a substrate;
• an interconnect structure over the substrate;
• a conductive pad over the interconnect structure;
• a passivation layer covering the interconnect structure and exposing the conductive pad;
• a first buffer layer over the passivation layer;
• a first etch stop layer over the first buffer layer;
• a second buffer layer over the first etch stop layer, wherein the first buffer layer and the second buffer layer are made of a first material;
• a second etch stop layer over the second buffer layer, wherein the first etch stop layer and the second etch stop layer are made of a second material, and the second material is different from the first material;
• and
• a device element over the second etch stop layer.