Semiconductor device having deep trench structure and method of manufacturing thereof

A method of manufacturing a semiconductor device, the method comprising:

• providing an active region and an isolation region on a substrate;
• forming a gate electrode on the active region;
• forming a first interlayer insulating film on the gate electrode;
• forming a deep trench through the isolation region on the substrate;
• forming a gap-fill insulating film on the gate electrode and sidewalls of the deep trench to fill the deep trench and seal an opening of the deep trench;
• forming a second interlayer insulating film on the gap-fill insulating film, the second interlayer insulating film comprising a convex region overlapping the gate electrode and a concave region overlapping the deep trench;
• performing an etch-back process on the second interlayer insulating film to selectively remove the convex region of the second interlayer insulating film overlapping the gate electrode;
• forming a contact plug connected to the active region;
• and
• forming a metal wiring on the contact plug.

A method of manufacturing a semiconductor device, the method comprising:

• providing an active region and an isolation region on a substrate;
• forming a gate electrode on the active region;
• forming a first interlayer insulating film on the gate electrode;
• forming a deep trench through the isolation region on the substrate;
• forming a gap-fill insulating film on the gate electrode and sidewalls of the deep trench to fill the deep trench and seal an opening of the deep trench;
• forming a second interlayer insulating film on the gap-fill insulating film, the second interlayer insulation film comprising a convex region overlapping the gate electrode and a concave region overlapping the deep trench;
• selectively removing the convex region of the second interlayer insulating film by forming a blocking pattern on the concave region of the second interlayer insulating film and performing an etch-back process on the convex region using the blocking pattern as a mask pattern, thereby reducing a thickness of the second interlayer insulating film;
• performing a planarization process on the second interlayer insulating film;
• forming a contact plug connected to the active region;
• and
• forming a metal wiring on the contact plug.