Block family error avoidance bin scans after memory device power-on

A method comprising:

• detecting, by a processing device, a power on event;
• in response to detecting the power on event, selecting a block of memory cells from a set of blocks of memory cells;
• causing, by the processing device with respect to the block, a first scan to be performed using a set of read level offsets to select, from a set of bins in accordance with a scan order, a first bin assigned with a first read level offset of the set of read level offsets resulting in a first bit error metric value, wherein each bin of the set of bins defines a block family comprising one or more blocks of memory cells that have been programmed within a specified time window;
• determining, by the processing device, whether the first bin is an initial bin of the scan order;
• in response to determining that the first bin is not the initial bin of the scan order, causing, by the processing device with respect to the block using a second read level offset of the set of read level offsets assigned to a second bin of the set of bins, a second scan to be performed to obtain a second bit error metric value, wherein the second bin immediately precedes the first bin in the scan order;
• and
• selecting, by the processing device based on first bit error metric value and the second bit error metric value, an optimal bin from the set of bins.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

• detecting a power on event;
• in response to detecting the power on event, selecting a block of memory cells from a set of blocks of memory cells;
• identifying a state of the block;
• and
• selecting, based on the state of the block, an optimal bin from a set of bins, wherein each bin of the set of bins defines a block family comprising one or more blocks of memory cells that have been programmed within a specified time window.