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US 12,183,405 B2Granted
Semiconductor memory device and memory system
AssigneeKioxia Corporation
InventorsMitsuhiro Abe, Yasuhiro Hirashima, Mitsuaki Honma
Life of this patent
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Abstract
A semiconductor memory device includes a first pad, a clock generation circuit configured to generate a first clock, an output circuit configured to output the first clock through the first pad, a designation circuit configured to designate one of a plurality of contiguous times slots, each of which is set with respect to clock cycles of the first clock, and a peak control circuit configured to execute an operation that generates a current peak, at a timing corresponding to the designated time slot.
Claims17
A semiconductor memory device comprising:
- a first pad;
- a clock generation circuit configured to generate a first clock, wherein the clock generation circuit includes an oscillator, and a frequency divider configured to divide a frequency of an output of the oscillator to generate the first clock;
- a memory that stores first information indicating a total number of time slots, second information indicating which of the time slots should be designated as a designated time slot, and third information designating the semiconductor memory device as either a leader or a follower;
- an output circuit configured to output the first clock through the first pad;
- a designation circuit configured to count clock cycles of the first clock and designate one of the time slots as the designated time slot based on a count of the clock cycles, the first information, and the second information;
- and
- a peak control circuit configured to execute an operation that generates a current peak, at a timing corresponding to the designated time slot, wherein
- the output circuit is operational when the semiconductor memory device is designated as the leader, and is not operational when the semiconductor memory device is designated as the follower.
5 more elements
A memory system comprising:
- a plurality of semiconductor memory devices, each including
- a first pad,
- a clock generation circuit configured to generate a first clock,
- an output circuit configured to output the first clock through the first pad,
- a designation circuit configured to designate one of a plurality of contiguous time slots, each of which is set with respect to clock cycles of the first clock, and
- a peak control circuit configured to execute an operation that generates a current peak, at a timing corresponding to the designated time slot;
- and
- a memory controller configured to control the plurality of semiconductor memory devices.
5 more elements
Dependencies are inferred from the claim text.