Three dimensional stacked nonvolatile semiconductor memory having a controller configured to execute a program operation on memory cells

A memory device comprising:

• a memory string including a first select transistor, a second select transistor, and a plurality of memory cells electrically coupled between the first select transistor and the second select transistor in series;
• and
• a controller coupled to the memory string, the controller configured to execute a program operation on one of the plurality of memory cells by:
• applying, during a first time period, a first voltage to gates of the plurality of memory cells,
• applying, during the first time period, a second voltage higher than the first voltage to a gate of the first select transistor,
• applying, during a second time period after the first time period, a third voltage higher than the first voltage to a gate of the one of the plurality of memory cells, and
• applying, during the second time period, a fourth voltage lower than the second voltage to the gate of the first select transistor.