Bistable circuit and electronic circuit
AssigneeJapan Science and Technology Agency
InventorsSatoshi Sugahara, Yusaku Shiotsu
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AssigneeJapan Science and Technology Agency
InventorsSatoshi Sugahara, Yusaku Shiotsu
Estimating the term…
A bistable circuit includes a pair of inverter circuits each including a first FET being connected between a power supply line and an intermediate node and having a gate coupled to an input node and a first conductivity type channel, a second FET being connected between the intermediate node and an output node and having a gate coupled to the input node and the first conductivity type channel, a third FET being connected between the intermediate node and a bias node, a fourth FET being connected between the output node and a control line and having a gate coupled to a word line and a second conductivity type channel, wherein the pair of inverter circuits are connected in a loop shape, and gates of the third FETs of the pair of inverter circuits are coupled to one of the input and output nodes of the pair of inverter circuits.
A bistable circuit comprising:
Dependencies are inferred from the claim text.