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US 12,183,266 B1Granted
Gate driving circuit and display panel
AssigneeWuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorHuanxi Zhang
Life of this patent
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Abstract
The present disclosure provides a gate driving circuit and a display panel. by the control of one of the fourth node, the output end of the second output module, and the first node of the shift register of the next stage, the voltage regulating module may utilize a low voltage signal to stabilize or reduce the gate voltage of the second transistor, so that the second transistor is stable or preferably in the cut-off state to reduce the leakage current. In this way, voltage level of the second gate driving signal can be maintained at a high voltage level or a pulse amplitude.
Claims20
A gate driving circuit, comprising a plurality of shift registers,
- wherein at least one of the plurality of shift registers comprises:
- a cascade signal selection module, electrically connected between a first wiring and a first node;
- a pull-up control module, configured to conduct a voltage level of a first node to the second node in response to a first clock signal;
- a first filter module, electrically connected between the second node and a third node, wherein a control end of the first filter module receives a reset signal;
- a second filter module, electrically connected between the first filter module and the third node, wherein a control end of the second filter module receives a filter control signal;
- a first inverting module, connected between the second node and a fourth node;
- a first output module, configured to output a first gate driving signal according to a voltage level of the third node and a voltage level of the fourth node;
- a second output module, comprising a P-type first transistor and an N-type second transistor, wherein a first electrode of the first transistor is electrically connected to a first high voltage line, a second electrode of the first transistor is electrically connected to a first electrode of the second transistor to output a second gate driving signal, a second electrode of the second transistor is receives a first low voltage signal, the second node is electrically connected to a gate of the first transistor and a gate of the second transistor;
- and
- a voltage regulating module, receiving a low voltage signal and connected to the gate of the second transistor, wherein a control end of the voltage regulating module is electrically connected to one of the fourth node, an output end of the second output module and the first node of the shift register of a next stage.
7 more elements
A display panel, comprising:
- a pixel circuit, comprising:
- a writing transistor, configured to control an input of a data signal;
- and
- a compensation transistor, configured to control the data signal to be inputted to a gate of driving transistor;
- and
- a gate driving circuit comprising a plurality of shift registers, wherein at least one of the plurality of shift registers comprises:
- a cascade signal selection module, electrically connected between a first wiring and a first node;
- a pull-up control module, configured to conduct a voltage level of a first node to the second node in response to a first clock signal;
- a first filter module, electrically connected between the second node and a third node, wherein a control end of the first filter module receives a reset signal;
- a second filter module, electrically connected between the first filter module and the third node, wherein a control end of the second filter module receives a filter control signal;
- a first inverting module, connected between the second node and a fourth node;
- a first output module, configured to output a first gate driving signal according to a voltage level of the third node and a voltage level of the fourth node;
- a second output module, comprising a P-type first transistor and an N-type second transistor, wherein a first electrode of the first transistor is electrically connected to a first high voltage line, a second electrode of the first transistor is electrically connected to a first electrode of the second transistor to output a second gate driving signal, a second electrode of the second transistor is receives a first low voltage signal, the second node is electrically connected to a gate of the first transistor and a gate of the second transistor;
- and
- a voltage regulating module, receiving a low voltage signal and connected to the gate of the second transistor, wherein a control end of the voltage regulating module is electrically connected to one of the fourth node, an output end of the second output module and the first node of the shift register of a next stage.
12 more elements
Dependencies are inferred from the claim text.