Memory device and neural network apparatus

A memory device storing weights set for a synaptic circuit in a neuromorphic processor using a neural network, the memory device comprising:

• a first accumulation circuit configured to accumulate an electric charge;
• a second accumulation circuit configured to accumulate an electric charge;
• an update circuit configured to change a difference between a charge amount accumulated in the first accumulation circuit and a charge amount accumulated in the second accumulation circuit;
• and
• an output circuit configured to output, as an output signal representing the weight, a signal corresponding to the difference between the charge amount accumulated in the first accumulation circuit and the charge amount accumulated in the second accumulation circuit, wherein
• the update circuit performs the change of the difference by
• receiving a presynaptic spike, a postsynaptic spike, and a supervisory signal, in spike timing dependent synaptic plasticity learning;
• applying, in a first direction, a predetermined current to the first accumulation circuit in a period during which the supervisory signal indicates first logic, the presynaptic spike indicates the first logic, and the postsynaptic spike indicates the first logic, the first direction being either an increasing direction or a decreasing direction, and
• applying a current of a predetermined value to the second accumulation circuit in a period during which the supervisory signal indicates second logic, the presynaptic spike indicates the first logic, and the postsynaptic spike indicates the first logic,
• the supervisory signal is a binary signal indicating that an input signal is being given to the neural network,
• the presynaptic spike is a signal indicating that a presynaptic neuron connected to a previous stage of the synaptic circuit has fired, and
• the postsynaptic spike is a signal indicating that a postsynaptic neuron connected to a subsequent stage of the synaptic circuit has fired.

A neural network apparatus comprising:

• an arithmetic circuit configured to execute arithmetic processing according to a neural network;
• an inference weight memory circuit configured to store a plurality of inference weights used in the arithmetic processing to be executed by the arithmetic circuit;
• a learning weight memory circuit configured to store a plurality of weights corresponding to the plurality of inference weights in a learning process of the neural network;
• and
• a learning control circuit configured to, in the learning process,
• control the learning weight memory circuit to update the plurality of weights stored in the learning weight memory circuit, based on a result of operation of the arithmetic circuit, and,
• after the learning process, control the learning weight memory circuit to store a plurality of values corresponding to the plurality of weights stored in the learning weight memory circuit, as the plurality of inference weights in the inference weight memory circuit, wherein
• the learning weight memory circuit includes a plurality of memory devices corresponding to a plurality of weights,
• each one of the plurality of weights corresponds to a different one of the plurality of memory devices,
• each one of the plurality of memory devices includes
• a first accumulation circuit configured to accumulate electric charges,
• a second accumulation circuit configured to accumulate electric charges,
• an update circuit configured to change, in accordance with an update amount for updating a corresponding weight among the plurality of weights, a difference between a charge amount accumulated in the first accumulation circuit and a charge amount accumulated in the second accumulation circuit, and
• an output circuit configured to output, as an output signal representing the corresponding weight, a signal corresponding to a difference between the charge amount accumulated in the first accumulation circuit and the charge amount accumulated in the second accumulation circuit, and
• the update circuit performs the change of the difference by
• changing, when the update amount is positive, the electric charges accumulated in the first accumulation circuit in a first direction by a charge amount corresponding to an absolute value of the update amount, the first direction being either an increasing direction or a decreasing direction, and
• changing, when the update amount is negative, the electric charges accumulated in the second accumulation circuit in the first direction by a charge amount corresponding to an absolute value of the update amount.