Call and return instructions for saving and restoring different sets of context registers mapped to different call opcodes

A method, comprising:

• receiving, while executing a first subroutine, a first call instruction that includes a first opcode and identifies a first target address, wherein the first target address stores a first instruction of a set of instructions for performing a second subroutine;
• determining a first set of context registers mapped to the first opcode, wherein the determining is based on the first opcode and not the first target address;
• storing content of the first set of context registers in first memory allocated for context storage for the first subroutine;
• and
• storing identifying information of the first set of context registers in a status register for the first subroutine;
• jumping to the first target address;
• while executing the second subroutine, receiving a return instruction that includes a second opcode and identifies a second target address, wherein the second target address stores a particular instruction of a set of instructions for performing the first subroutine;
• determining the first set of context registers based on the identifying information of the first set of context registers stored in the status register for the first subroutine;
• restoring content of the first set of context registers from the first memory allocated for context storage for the first subroutine;
• and
• executing the particular instruction stored in the second target address.

A processor configured to perform operations, the operations comprising:

• receiving, while executing a first subroutine, a call instruction that includes a first opcode and identifies a first target address, wherein the first target address stores a first instruction of a set of instructions for performing a second subroutine;
• determining a first set of context registers mapped to the first opcode;
• storing content of the first set of context registers in first memory allocated for context storage for the first subroutine;
• and
• jumping to the first target address;
• receiving a second call instruction that includes a second opcode, different from the first opcode, and identifies the first target address;
• determining a second set of context registers, different from the first set of context registers, mapped to the second opcode;
• storing content of the second set of context registers in second memory allocated for context storage for the second subroutine;
• and
• executing the first instruction stored in the first target address.